Software-Defined Radio Implementation on the HyperX Processor

This whitepaper introduces the HyperX computing platform and associated development tools. A HyperX memory-network processor represents a massively parallel processing system composed of a grid of processing elements embedded in an array of data memory and routing units. This scalable processing fabric supports the rapid software-based development of computationally-intensive virtualized systems that might otherwise be implemented in hardware. The HyperX software-based approach allows for significant flexibility in application design and development, while operating with low power consumption. HyperX processors can be used in many different application areas, and the example area of Software-Defined Radio is presented here along with an illustrative real-life implementation of complete ATSC 3.0 receiver. The mapping of physical layer functional blocks to specific HyperX resources demonstrates the C-based development process, and the verification and validation of the integrated receiver show some of the HyperX tools that are available. The 100% software-based and virtualized ATSC 3.0 physical layer can be easily updated in the field as desired, and specific receiver components can be easily reused and integrated into other communications applications.

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